NCS8801S RGB/LVDS-to-eDP Converter (1/2/4-lane eDP)
Features
--Embedded-DisplayPort (eDP) Output
1/2/4-lane eDP @ 1.62/2.7Gbps per lane
HD to WQXGA (2560*1600) supported
Up to 6dB pre-emphasis
--RGB Input
18/24bit RGB Interface
Pixel clock up to 270MHz
SDR/DDR supported
Pin order reversal supported
--LVDS Input
Single/Dual-channel 6/8bit LVDS (Sync)
interface
400Mbps to 1Gbps per data pair
Built-in termination
Channel and polarity swap supported
--Reference Clock
Any freq. between 19MHz and 100MHz
Crystal or single-ended clock input
Built-in 5000ppm SSC generator
--Misc
I2C for chip configuration
Built-in eDP handshake protocol
I2C-AUX channel for TCON/DPCD/EDID
control
Built-in video test pattern
--Power
1.2V core supply
2.5V or 3.3V IO supply
RGB IO can go down to 1.8V
Power consumption ~ 100mW
@ 2048*1536*24bit*60Hz, LVDS mode
Deep-sleep mode power <1mW
--Package
QFN-56 (7mm x 7mm) package
RoHS Compliant
--Availability
Samples available now
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NCS8803 HDMI-to-eDP w/ Scaler
Features
--Embedded-DisplayPort (eDP) Output
1/2/4-lane eDP @ 1.62/2.7Gbps per lane
HD to WQXGA (2560*1600) supported
Up to 6dB pre-emphasis
--HDMI Input
HDMI 1.4a supported
RGB444/YCbCr444/YCbCr422 supported
Pixel clock up to 340MHz
2-channel audio supported
Adaptive equalization
--Reference Clock
Any freq. between 19MHz and 100MHz
Crystal or single-ended clock input
Built-in 5000ppm SSC generator
--Misc
I2C for chip configuration
Built-in eDP handshake protocol
I2C-AUX channel for TCON/DPCD/EDID
control
Built-in video test pattern
--Power
1.2V core supply
2.5V or 3.3V IO supply
Power consumption ~ 150mW
@ 2560*1600*24bit*60Hz
Deep-sleep mode power <1mW
--Package
QFN-56 (7mm x 7mm) package
RoHS Compliant
--Availability
Samples by the end of 2016
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NCS8805 RGB/LVDS-to-eDP w/ Scaler
The NCS8805 is a display format converter with Hi-Fidelity scaling function. Sitting between the application processor and the LCD panel, it bridges the gaps between different display interfaces and different resolutions. The goal is to let our customer completely get over the issue of display compatibility.

Features
Covers a wide range of display format
Multiple input/output interfaces supported
Output resolution from HD to 4K
Input resolution from HD to 2K
Advanced fractional scaler
Hi-Fidelity scaling
Supports any scaling ratio between 1:2 and 2:1
Low power consumption

NCS8806 LVDS-to-VBO w/ Scaler
Features
--V-By-One (VBO) Output
8/16-lane VBO @ max 3Gbps per lane
Up to [email protected]
supported
Up to 6dB pre-emphasis
Lane and polarity swap supported
--LVDS Input
Dual-channel LVDS interface
Up to [email protected]
supported
Built-in termination
Channel and polarity swap supported
--Scaler
Hi-Fidelity scaler w/ super-resolution engine
--Reference Clock
Any freq. between 19MHz and 100MHz
Crystal or single-ended clock input
Built-in 5000ppm SSC generator
--Misc
I2C for chip configuration
Built-in VBO handshake protocol
Built-in video test pattern
--Power
1.2V core supply
2.5V or 3.3V IO supply
Deep-sleep mode power <5mW
~300mW @4K60Hz w/ scaling
--Package
TQFP-128 (14mm x 14mm) package
RoHS Compliant
--Availability
Samples by the end of 2016
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NCS8807 LVDS-to-mLVDS w/ Scaler (4K TCON w/ Scaler)
General Description
NCS8807 is an LVDS 4K TCON with advanced scaling function. It takes LVDS input signal from the TV SoC, scales it up to 4K resolution, and drives the 4K panel.
By combining the 4K scaling and TCON functions into a single chip, NCS8807 enables the lowest cost solution for 4K TVs. Thanks to our proprietary scaling algorithm, NCS8807 provides high picture quality which is close to the current 4K TV solutions.
NCS8807 also support mainstream HD(720p) to FHD(1080p) scaling application.
Features
--mini-LVDS Output
1/2/4-port 3/6-pair mini-LVDS interface
Up to 4K (3840*2160) supported
Port and polarity swap supported
Adjustable gate control timing
--LVDS Input
Single/Dual-channel 6/8bit LVDS interface
400Mbps to 1Gbps per data pair
Built-in termination
Channel and polarity swap supported
--Scaler
High-order high-quality scaling engine
--Reference Clock
Any freq. between 19MHz and 100MHz
Crystal or single-ended clock input
Built-in 5000ppm SSC generator
--Misc
I2C for chip configuration
Built-in video test pattern
--Power
1.2V core supply
2.5V or 3.3V IO supply
Power consumption ~ 400mW @ 4K
--Package
LQFP-128 (14mm x 14mm) package
RoHS Compliant
--Availability
Samples by the end of 2016
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